Projects

A novel computational pipeline for species tree inference that combines Locus-of-Sequence (LoS) and Whole Genome (WG) data in a principled manner. LoS datasets offer high taxon sampling across tens of thousands of species but limited locus quality, while WG data provides numerous high-quality loci but narrower taxon coverage — MAGNET bridges both worlds, producing topology, branch lengths, and phylogenetic uncertainty estimates that remain accurate and interpretable. The pipeline scales to tens of thousands of species using HPC parallelization, handles varying WG assembly quality (scaffold to chromosome-scale) and diverse LoS types (exons, UCEs), and can incrementally incorporate new sequencing data without a full de novo re-inference. It is largely automated, with a user-friendly interface aimed at non-experts.

ROADIES is a fully automated end-to-end tool for constructing evolutionary trees of various species directly from their raw genome (DNA) assemblies, achieving a 176× speedup, was published in PNAS in 2025, selected as the issue's journal cover, and presented at ISMB 2024. It is open-sourced and actively used by researchers worldwide, and underlies ongoing collaborations with the Vertebrate Genomes Project (VGP) consortium and the Scripps Institution of Oceanography.

ROADIES-XP is a GPU-accelerated extension of ROADIES which enables placing new specis onto an existing species tree instead of computing de novo — significantly reducing compute time and enabling continuously updated phylogenies as sequencing data grows. GPU acceleration further speeds up the core alignment and tree estimation steps for massive datasets.

DP-HLS is an open-source framework for creating FPGA accelerators for dynamic programming algorithms in bioinformatics, covering DNA/RNA/Protein sequence alignment, homology search, basecalling, and more. DP-HLS achieves a 32× speedup over CPU baselines and cuts implementation time by 20× compared to hand-coded HDL. The framework includes 15 diverse DP kernels and is compatible with AWS EC2 F1 FPGA instances; the work was published at IEEE HPCA 2026.

Parallelized Suffix Array construction on GPUs, achieving an 86–571× speedup over optimized CPU baselines for genomic read mapping. Also accelerated dense matrix multiplication using CUDA on NVIDIA K80/T4 GPUs with Intel AVX2 vectorization, and optimized large-scale solvers (Aliev-Panfilov) on the Expanse Supercomputer using MPI and C++.

Improved the HLS4ML library for efficient ML hardware inference via High-Level Synthesis. Partnered with CERN's HLS4ML team to implement feature enhancements and optimizations on the DL-to-FPGA flow.